《Table 1Comparison of synthesized results for non-bus-splitting and bus-splitting EF-DSM》

《Table 1Comparison of synthesized results for non-bus-splitting and bus-splitting EF-DSM》   提示:宽带有限、当前游客访问压缩模式
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《A new digital transmitter based on delta sigma modulator with bus-splitting》


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FOM with different bus-splitting bit is plotted in Fig.13.It can be seen that when the 13-bit bus is split with MSB part of 6 bits,the FOM gets the highest.Table 1 shows the hardware consumption and maximum clock speed of non-bus-splitting EF-DSM(M=13)and bus-splitting with MSB part of 6 bits.The hardware consumption is reduced by more than 16%and the clock speed is promoted by 39%for the bus-splitting topology,and the resulted clock speed of 358MHz fulfills the sampling speed of oversampling rate of 16for a signal with 20MHz bandwidth,which is 320MHz,while the non-bus-splitting topology cannot achieve the required 320MHz.