《Tab.1 Comparison results of hardened latches》

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《一种新颖的双节点翻转自恢复的抗辐射加固锁存器（英文）》

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To quantitatively evaluate overheads of the proposed DNURH latch and make a comparison w ith the existing latches，w e similarly performed the simulations for the latches mentioned in Section 1（FERST[5]，LCHR[8]，DNCS[9]，NTHLTCH[10]，DONUT[11]and Delta DICE[12]）using the same technology.The transistor sizes of the latches are optimized to reduce overheads，especially，on the silicon area.Here，w e take the optimized transistor sizes of the C-elements for an example.The W/L of the PM OS transistor is 90/22 nm w hile the W/L of the NM OS transistor is 28/22 nm.Tab.1 show s the comparison results of the hardened latches.